This module contains the verification of the bitblaster BitVec.zeroExtend from Impl.Operations.ZeroExtend.

theorem Std.Tactic.BVDecide.BVExpr.bitblast.blastZeroExtend.go_get_aux {α : Type} [Hashable α] [DecidableEq α] (aig : Sat.AIG α) (w : Nat) (input : aig.RefVec w) (newWidth curr : Nat) (hcurr : curr ≤ newWidth) (s : aig.RefVec curr) (idx : Nat) (hidx : idx < curr) (hfoo : aig.decls.size ≤ (go aig w input newWidth curr hcurr s).aig.decls.size) : (go aig w input newWidth curr hcurr s).vec.get idx ⋯ = (s.get idx hidx).cast hfoo

theorem Std.Tactic.BVDecide.BVExpr.bitblast.blastZeroExtend.go_get {α : Type} [Hashable α] [DecidableEq α] (aig : Sat.AIG α) (w : Nat) (input : aig.RefVec w) (newWidth curr : Nat) (hcurr : curr ≤ newWidth) (s : aig.RefVec curr) (idx : Nat) (hidx : idx < curr) : (go aig w input newWidth curr hcurr s).vec.get idx ⋯ = (s.get idx hidx).cast ⋯

theorem Std.Tactic.BVDecide.BVExpr.bitblast.blastZeroExtend.go_denote_mem_prefix {α : Type} [Hashable α] [DecidableEq α] {assign : α → Bool} {inv : Bool} (aig : Sat.AIG α) (w : Nat) (input : aig.RefVec w) (newWidth curr : Nat) (hcurr : curr ≤ newWidth) (s : aig.RefVec curr) (start : Nat) (hstart : start < aig.decls.size) : ⟦assign, { aig := (go aig w input newWidth curr hcurr s).aig, ref := { gate := start, invert := inv, hgate := ⋯ } }⟧ = ⟦assign, { aig := aig, ref := { gate := start, invert := inv, hgate := hstart } }⟧

theorem Std.Tactic.BVDecide.BVExpr.bitblast.blastZeroExtend.go_denote_eq {α : Type} [Hashable α] [DecidableEq α] (aig : Sat.AIG α) (w : Nat) (input : aig.RefVec w) (newWidth curr : Nat) (hcurr : curr ≤ newWidth) (s : aig.RefVec curr) (assign : α → Bool) (idx : Nat) (hidx1 : idx < newWidth) : curr ≤ idx → ⟦assign, { aig := (go aig w input newWidth curr hcurr s).aig, ref := (go aig w input newWidth curr hcurr s).vec.get idx hidx1 }⟧ = if hidx : idx < w then ⟦assign, { aig := aig, ref := input.get idx hidx }⟧ else false

@[simp]

theorem Std.Tactic.BVDecide.BVExpr.bitblast.denote_blastZeroExtend {α : Type} [Hashable α] [DecidableEq α] {newWidth : Nat} (aig : Sat.AIG α) (target : aig.ExtendTarget newWidth) (assign : α → Bool) (idx : Nat) (hidx : idx < newWidth) : ⟦assign, { aig := (blastZeroExtend aig target).aig, ref := (blastZeroExtend aig target).vec.get idx hidx }⟧ = if hidx : idx < target.w then ⟦assign, { aig := aig, ref := target.vec.get idx hidx }⟧ else false